Would you like an opportunity to work with cutting-edge mobile phone technology?
Are you a Master’s student studying Computer Science or Electrical Engineering? Do you have a keen interest in processor architecture? We have an excellent opportunity for you!
At MediaTek’s Linköping (Sweden) office we develop programmable DSP processors targeted for signal processing in cellular modems for 3G, 4G and 5G.
In addition to driving the architecture evolution, we also implement the central components of the processor, as well as tools for configuring our processors for different uses, and a simulator/debugger used for developing firmware for our processors. We collaborate closely with a compiler team in the US as well as modem- and chipset developers based in Taiwan.
The Linköping office currently consists of around 20 employees. Our cutting-edge technology is widely used in MediaTek modems for 3G, 4G and 5G, and can be found in chipsets that are produced in millions every month. In fact, 1 in 3 mobile phones globally has MediaTek technology inside!
There are several possible tracks and we will decide the final direction of the work together, based on your background and interests. The common theme is processors, but the focus may be either towards hardware, or software. Below are some examples of possible projects:
Investigation of alternative hardware approaches for cache coherency
We want to investigate different approaches for implementing cache coherency in a system with several threads/processors and multiple levels of data cache. The goal is to propose a suitable hardware solution for our specific use case. Minimising HW cost and power consumption are important targets. The work will include a study of different solutions and their impact on performance, silicon area and power consumption. A simulation environment for cache performance evaluations will be developed.
Keywords: Cache coherency, simulation.
Evaluation of instruction level parallelism
In this project, you will investigate different options for instruction level parallelism in a processor with a given instruction set. The starting point is an existing VLIW-processor, where the compiler statically schedules parallel instructions. You will be tasked with investigating what performance increase can be reached for a given application by moving to a super scalar architecture, where hardware dynamically schedules instructions, with different amounts of parallel execution units. A prototype simulator for a superscalar processor will be developed.
Keywords: Processor architecture, C++.
Design of instruction encoding and decoder hardware
You will investigate different ways of organising and optimising the instruction encoding (how assembler instructions are mapped to binary code) and the instruction decoder (the hardware that translates binary code into control signals for the processor data path) for a processor with variable length instruction encoding. Given an instruction set and firmware code that is representative of our application, we want you to investigate different trade-offs between program memory usage and decoder complexity (clock frequency and silicon area).
Keywords: Optimisation, digital design, Verilog.
Fast instruction accurate simulation
For this project, you will investigate techniques for fast processor simulation. In particular, we want you to investigate the problems and solutions involved in simulating a processor on instruction level, as opposed to cycle accurate level. You will develop a prototype simulator for our processor.
Keywords: Modelling/simulation, C++.
With 150,000 inhabitants, Linköping is the fifth largest city in Sweden. It is located in the beautiful Östergötland region in the south east of Sweden, less than two hours from Stockholm. Our office is located in Mjärdevi Science Park, with a close connection to Linköping University, one of the top universities in Sweden.
High-speed train connections take you to Stockholm in 1 hour 40 minutes and to Copenhagen in 3 hours. The local airport offers direct flights to Copenhagen and Amsterdam.
This is a 5 month+ project and will run from January 2020 (exact start date is flexible).
MediaTek is the world’s 4th largest global fabless semiconductor company, leading the market in chipset technology. We enable more than 1.5 billion consumer electronic products a year including Smart TVs, Voice Assistant Devices (VAD), Android tablets, feature phones, Optical and Blu-ray DVD players, and we’re number two globally in mobile phones.
MediaTek looks for people with a great passion and work ethic, who have a broad set of technical skills and are ready to master new technologies and tackle some of industry’s greatest challenges to positively impact billions of future users. From 4G and 5G smartphones, to tablets and digital television, MediaTek are changing the industry one innovative product after another.
We pride ourselves on having an accomplished and successful global collaborative team culture and a competitive compensation package. We know that each person makes important contributions, and that they are integral to our success.
To apply for this exciting internship please apply to ‘Master’s Thesis Project (Examensarbete): Processor architecture for mobile communication’, including a CV, your contact details and a brief cover letter describing why you feel you are suited to the role.
For any queries, please contact email@example.com